Purpose

The Process Design Kit (PDK) Working Group is developing a format for PDK roadmap representation and development criteria at various stages in the process lifecycle.

Initiatives

Creating a industry forum to gain a better understanding of the different PDK formats that currently exist within the industry, how they differ from one another, what they define, who can use them, etc.

Mixed-Signal/RF PDK Checklist – The Working Group has improved and revised the current version of the Checklist to include a "PDK Details" section, which can help one assess if a PDK can be used with a given software.

Deliverables

Mixed-Signal/RF PDK Checklist – A document completed by the process design kit (PDK) developer and delivered with each new release of a mixed-signal/RF PDK. This document helps obtain a better understanding of the source data, completeness and quality of the PDK before using it to design ICs or to modify it to fit into your in-house design flow. A Checklist Users Guide is also available for download.

Leadership

Thomas Moerth, MS/RF PDK Working Group Chairman, austriamicrosystems
(T) +43 3136 500 5154
(E) thomas.moerth@austriamicrosystems.com

Resources

• March 30, 2010 - PDK Working Group Meeting Minutes (PDF, 20KB)
• Jan 26, 2010 - PDK Working Group Meeting Minutes (PDF, 30KB)
• Dec 1, 2009 - PDK Working Group Meeting Presentation (PDF, 2541 KB)
• Nov 10, 2009 - PDK Working Group Meeting Minutes (PDF, 20 KB)
• Dec 2, 2008 - PDK Working Group Meeting Minutes (PDF, 19 KB)
• Nov 4, 2008 - PDK Working Group Meeting Minutes (PDF, 24 KB)
• Oct 7, 2008 - PDK Working Group Meeting Minutes (PDF, 21 KB)
• June 24, 2008 - PDK Working Group Meeting Minutes (PDF, 20 KB)
• Apr 22, 2008 - PDK Working Group Meeting Minutes (PDF, 21 KB)
• Feb 26, 2008 - PDK Working Group Meeting Minutes (PDF, 21 KB)
• Oct 23, 2007 - PDK Working Group Meeting Minutes (PDF, 26 KB)
• July 10, 2007 - PDK Working Group Meeting Minutes (PDF, 26 KB)
• Apr 24, 2007 - PDK Working Group Meeting Minutes (PDF, 23 KB)
• Feb 27, 2007 - PDK Working Group Meeting Minutes (PDF, 23 KB)
• Jan 9, 2007 - PDK Working Group Meeting Minutes (PDF, 23 KB)

For copies of meeting minutes prior to 2007, please contact Chelsea Boone.

PDK Checklist Adoption Table

Purpose

The PCM/Process Checklist Working Group's mission is to define a standard way of communicating basic process parameters and criteria for mixed-signal/RF processes and to develop standard definitions for quantitative and qualitative metrics that can be used for classification and as figures of merit in selecting an appropriate process and process options for a specific design application.

Initiatives

AMS/RF Process Checklist – The Working Group has developed a four-page Process Checklist that reflects the key attributes of an AMS/RF foundry process offering and provides standard definitions for quantitative and qualitative metrics that can be used for classification and as figures of merit in selecting an appropriate process and process options for a specific design application. The current version 1.0 includes sections for process type, process release status, process attributes, passive device attributes, foundry logistics, active device attributes, and libraries and IP.

Mixed-Signal/RF PCM Checklist – Now that the Process Checklist is complete, the Working Group will work to develop a checklist that will help in communicating basic process parameters and criteria for mixed-signal and RF processes.

Deliverables

AMS/RF Process Checklist – This document identifies the different elements of a foundry's AMS/RF process and its ability to fulfill a semiconductor company's needs; it serves as a basic set of guidelines for measuring available items in an AMS/RF foundry process; and it is an efficient way to communicate information in a consistent format across all foundries.

• Article: "Why Is the GSA's New AMS/RF Process Checklist Useful?" (Chip Design) by David Schwan, Engineering Manager, CAD/Layout, RF Micro Devices, GSA MS/RF PCM/Process Checklist Working Group Chairman

Leadership

David Schwan, PCM/Process Checklist Working Group Chairman
(E) davidsch@earthlink.net

Resources

• February 17, 2010 - PCM/Process Checklist Working Group Meeting Minutes (PDF, 33 KB)
• Oct 21, 2009 - PCM/Process Checklist Working Group Meeting Minutes (PDF, 34 KB)
• Sept 23, 2009 - PCM/Process Checklist Working Group Meeting Minutes (PDF, 35 KB)
• Jun 24, 2009 - PCM/Process Checklist Working Group Meeting Minutes (PDF, 33 KB)
• May 20, 2009 - PCM/Process Checklist Working Group Meeting Minutes (PDF, 33 KB)
• Feb 18, 2009 - PCM/Process Checklist Working Group Meeting Minutes (PDF, 24 KB)
• Dec 4, 2007 - PCM/Process Checklist Working Group Meeting Minutes (PDF, 23 KB)
• Nov 5, 2007 - PCM/Process Checklist Working Group Meeting Minutes (PDF, 29 KB)
• Apr 17, 2007 - Process Checklist Working Group Meeting Minutes (PDF, 26 KB)
• Mar 13, 2007 - Process Checklist Working Group Meeting Minutes (PDF, 26 KB)
• Jan 30, 2007 - Process Checklist Working Group Meeting Minutes (PDF, 26 KB)

In January 2009, GSA merged its efforts with MOS-AK, a well-known industry compact modeling volunteer group primarily focused in Europe, to re-activate its Modeling Working Group. In April 2010, the MOS-AK/GSA Modeling Working Group then merged its efforts with GSA's MS/RF Model Working Group. Its purpose, initatives and deliverables coincide with MOS-AK's purpose, initatives and delieverables as outlined below.

Purpose

To Connect:

• Encourage interaction and sharing of all information related to compact modeling at all levels of the device and circuit characterization, modeling and simulations. The Working Group aspires to build a community with global connections by:
• Promoting standardization of compact models and its implementation into software tools.
• Connecting national and local modeling groups.
• Building strong bilateral ties with similar organizations around the world.

To Benchmark:

• Conduct regular meetings with industry players and academia to exchange information on the strengths and weaknesses of the industrialization of compact models. Activities include:
  • Drafting of standards and providing a center of competence for engineers, designers, managers and decision makers.
  • Evaluating world-wide best practices and success stories.
  • Delivering a comprehensive view of compact modeling education

To Educate:

• The Working Group believes that the transfer of advanced compact modeling methodologies to industry can be accelerated by providing comprehensive reports and reference papers on the subjects of:
  • Basic issues and concepts of device characterization and compact modeling.
  • Global device characterization and compact modeling issues.
  • Examples and analysis of best practice of the commercialization of compact models.

Initiatives

The MOS-AK/GSA Modeling Working Group will play a central role in developing a common language among foundries, CAD vendors, IC designers and model developers by contributing and promoting different elements of compact model standardization and related tools for model development, validation/implementation and distribution.

Deliverables

2010 Events:

• MOS-AK/GSA Modeling Workshop
  Date: April 8-9, 2010
  Location: The Faculty of Engineering, Sapienza Università di Roma, Via Eudossiana 18, Rome
  Press Release (April 26, 2010): MOS-AK/GSA Modeling Working Group Holds Workshop in Rome
• Analog Modeling Panel in connection with GSA & IET International Semiconductor Forum
  Date: May 18, 9:00am-12:00pm
  Location: Novotel London St Pancras
• Special MIXDES Modeling Session
  Date: June 24-26
  Location: Wroclaw, Poland
• Compact Modeling Training Course
  Date: June 30-July 1
  Location: Tarragona, Spain
• MOS-AK/GSA Modeling Workshop
  Date: Sept. 17
  Location: Seville, Spain
• MOS-AK/GSA Modeling Meeting
  Date: Dec. 2010
  Location: San Francisco, CA

Publications: All publications can be found online at http://www.mos-ak.org/.

Books:

• Transistor Level Modeling for Analog/RF IC Design; Editors:W.Grabinski, B.Nauwelaers, D.Schreurs ISBN: 1-4020-4555-7; 2006, Approx. 290 p., Hardcover; www.springer.com
• Power/HVMOS Devices Compact Modeling Editors:W.Grabinski, T.Gneiting ISBN: n/a, Approx. 250 p., (2009 exp) Hardcover; www.springer.com

Tools:

Mixed-Signal/RF SPICE Model Checklist – A document completed by the SPICE model developer and delivered with each new release of an SPICE model. This document helps developers better understand the source data, completeness and quality of the model before using it to design ICs or to re-extract it to fit into specific product needs. A Checklist Users Guide and Checklist Taxonomy & Definitions are also available for download.

SPICE Model Checklist Adoption Table

Leadership