- EDA/Design
Working Groups
Modeling
3D Standards
EDA/Design Working Groups
3D Standards
GSA is collaborating with Si2 on 3D standards, primarily focusing on through silicon via (TSV) modeling and the significant challenges 3D design brings to existing design flows and tools for 2D design. Semiconductor companies and foundries are encouraged to help this working group by filling out a brief survey on 3D integration efforts.
For more information, contact Kristen Pillans at 972.866.7579 ext. 124 or kpillans@gsaglobal.org.
Modeling
In January 2009, GSA merged its efforts with MOS-AK, a
well-known industry compact modeling volunteer group primarily focused in Europe, to re-activate
its Modeling Working Group. This working group will help to create a smooth compact modeling interface
between the technology (CMOS fabrication) and the IC design. For more information, contact Chelsea Boone at 972.866.7579 ext. 123 or cboone@gsaglobal.org.
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In January 2009, GSA merged its efforts with MOS-AK, a
well-known industry compact modeling volunteer group primarily focused in Europe,
to re-activate its Modeling Working Group. Its purpose, initatives and deliverables
coincide with MOS-AK's purpose, initatives and delieverables as outlined below.
Purpose
To Connect:
- Encourage interaction and sharing of all information related to compact modeling at all
levels of the device and circuit characterization, modeling and simulations. The Working Group
aspires to build a community with global connections by:
- Promoting standardization of compact models and its implementation into software tools.
- Connecting national and local modeling groups.
- Building strong bilateral ties with similar organizations around the world.
To Benchmark:
- Conduct regular meetings with industry players and academia to exchange information on the strengths and weaknesses of the industrialization of compact models. Activities include:
- Drafting of standards and providing a center of competence for engineers, designers,
managers and decision makers.
- Evaluating world-wide best practices and success stories.
- Delivering a comprehensive view of compact modeling education
To Educate:
- The Working Group believes that the transfer of advanced compact modeling methodologies to
industry can be accelerated by providing comprehensive reports and reference papers on the subjects of:
- Basic issues and concepts of device characterization and compact modeling.
- Global device characterization and compact modeling issues.
- Examples and analysis of best practice of the commercialization of compact models.
Initiatives
The Modeling Working Group will play a central role in developing a common language among
foundries, CAD vendors, IC designers and model developers by contributing and promoting different
elements of compact model standardization and related tools for model development, validation/implementation
and distribution.
Deliverables
Events:
- C4F MOS-AK/GSA Rome Workshop
Date:
April 8-9, 2010
Location:
The Faculty of Engineering, Sapienza Università di Roma, Via Eudossiana 18, Rome
- MOS-AK/GSA Workshop in Baltimore
Date:
Dec 9, 2009
Location: Johns Hopkins University, Homewood Campus, Computational Sciences and Engineering, Building (CSEB), Room CSEB 17
- ESSDERC/ESSCIRC Workshop
Date: Sept.18, 2009
Location: Athens, Greece
Greek Compact Modeling Map
Publications: All publications can be found online at http://www.mos-ak.org/.
Books:
- Transistor Level Modeling for Analog/RF IC Design; Editors:W.Grabinski, B.Nauwelaers,
D.Schreurs ISBN: 1-4020-4555-7; 2006, Approx. 290 p., Hardcover; www.springer.com
- Power/HVMOS Devices Compact Modeling Editors:W.Grabinski, T.Gneiting ISBN: n/a, Approx.
250 p., (2009 exp) Hardcover; www.springer.com
Leadership
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North America
Chair: Pekka Ojala, Exar Corporation
(T) 510.668.7543
(E) pekka.ojala@exar.com
Co-Chair:
Geoffrey Coram,
Analog Devices, Inc.
Co-Chair: Jamal Deen, McMaster University
South America
Chair: Prof. Gilson I Wirth, Universidade Federal Do Rio Grande Do Sul (UFRGS), Brazil
(T)
+ 55 (51) 3308-4443
(E)
wirth@inf.ufrgs.br
Co-Chair: Prof. Carlos Galup-Montoro, Universidade Federal de Santa Catarina (UFSC), Brazil
Co-Chair: TBD
Europe
Chair: Ehrenfried Seebacher, austriamicrosystems AG
(T) +43 3136 500 5487
(E) ehrenfried.seebacher@austriamicrosystems.com
Co-Chair: Sebastian Schmidt, X-FAB Semiconductor Foundries AG
Co-Chair: Benjamin Iniguez, Universitat Rovira I Virgili (URV) |
Asia
Chair:
Goichi Yokomizo, STARC
(T) +81-45-478-3750
(E) yokomizo.goichi@starc.or.jp
Co-Chair: Sadayuki Yoshitomi, Toshiba
Co-Chair:
Prof. Xing Zhou,
Nanyang Technological University
MOS-AK Workshop Manager
Wladek Grabinski, GMC Suisse
(T)
+41 22 349 0939
(E) wladek@grabinski.ch |
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Upcoming Events
C4F MOS-AK/GSA Rome Workshop
Date:
April 8-9, 2010
Location:
The Faculty of Engineering, Sapienza Università di Roma, Via Eudossiana 18, Rome
Get Involved
Those who deal with modeling-related issues, such as model generation, extraction,
validation and comparison are encouraged to get involved (modeling engineers, model developers,
compact model designers, etc.).
Join This Working Group – By signing up, you will
be added to a distribution list and receive upcoming meeting notifications.
Social Media
Join our Social Media groups and stay informed. LinkedIn groups are specific to each GSA Interest Group/Working Group.


Questions?
GSA Contact
Chelsea Boone, Sr. Research Analyst
(T) 972-866-7579 ext. 123
(E) cboone@gsaglobal.org
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GSA is collaborating with Si2 on 3D standards, primarily focusing on through silicon via
(TSV) modeling and the significant challenges 3D design brings to existing design flows and
tools for 2D design.
A "Requirements for 3D Design Flow Interoperability Standards" workshop was held
on October 1st in Santa Clara, CA, where nearly 50 attendees represented all parts of the supply
chain, academia and other standards organizations. Click on the links below to download each
presentation (Listed in order they were presented at event).
3D Architecture for Semiconductor Integration & Packaging Conference
December 9-11, 2009 San Francisco, CA
Si2 Presentation - Sumit Gupta
Your feedback is needed! The group is currently surveying semiconductor companies on 3D
Integration. We would like {Company}’s input on motivations and plans regarding using
3D technology with Through Silicon Vias (TSV), including preferences and recommendations.
Click here to answer
the brief online survey.
For more information, contact Kristen Pillans at 972.866.7579 ext. 124 or
kpillans@gsaglobal.org.
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Events
Going to DATE? Attend GSA-supported 3D events throughout the week
Resources
Information to come.
Social Media
Join our Social Media groups and stay informed. LinkedIn groups
are specific to each GSA Interest Group/Working Group.


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