Meeting the Challenges of Small Radio
Frequency ICs
Jose Harrison, Director, Product Marketing, Computing and Consumer, SiGe Semiconductor Inc.
Peter L. Gammel, Chief Technical Officer and Vice President, Engineering, SiGe Semiconductor Inc.
The latest communication devices incorporate multiple protocols
within a single appliance, often with incompatible frequency
bands and modulation schemes. Handsets, for instance, might
need to support cellular, Wi-Fi and Bluetooth, while computers may
need to handle Wi-Fi, cellular, Bluetooth and WiMAX signals. The
complexity of the multiple radio frequency (RF) signal chains in these
advanced designs is placing high demands on available technology
and requiring skillful engineering choices to adequately address issues
of size, battery life and cost without compromising performance.
In terms of semiconductor choices, designers of components for
advanced communications devices can choose to pursue a single
system-on-chip (SOC) design, which includes both the RF front end
(analog circuitry) as well as the baseband transceiver (digital circuitry),
or they can work using a two-chip solution that incorporates the
best of silicon CMOS circuitry for the digital realm and another
material, such as SiGe or GaAs, for the integrated RF circuitry. In
this approach, both SiGe and GaAs offer advantages for different
applications. A significant amount of research and development has
been conducted to advance SiGe processing and design techniques in
recent years, which has greatly improved its advantages for use in the
latest communication devices that need to deliver high output power
and support multiple protocols and frequencies.
Design Challenges
Perhaps unsurprisingly, the major design challenges facing radio
designers include size, battery life and cost. The need for compact size
is being driven primarily by smartphone technology, which was first
pioneered by Palm and then expanded by Apple, RIM and others.
These multi-functional wireless devices demand diverse connectivity
all within a small handheld device. However, the need for compact
size is not unique to handsets. Laptops and the emerging netbook
portable computers are allowing less and less space for connectivity,
yet they demand links for Wi-Fi, cellular, Bluetooth and WiMAX.
The industry has seen a rapid shrinking of card size in laptops,
driving from the PCMCIA card to the mini card and the half mini
card in record time. These trends suggest that the size challenges for
connectivity will not abate in next-generation laptops or handsets.
Following the trend of increased connectivity, computing is
migrating from the desktop to the laptop and the handset, increasing
concerns over power consumption due to its effects on battery life or
so called “talk time,” which refers to the amount of time a portable
appliance can function on a single charge. Another metric for battery
life is “idle time,” or the amount of time an appliance can be turned
on but not in active use. Idle time is strongly influenced by the
amount of current “leaking” through an appliance when it is turned
on but not in use.
In consumer markets, such as mobile handsets and portable computers,
cost is a critical concern and remains high on the list of challenges for
radio designers as they tackle the intricacies of the RF signal chain or
“front end.” All these design constraints – size, battery life and cost –
must be balanced with performance needs and customer expectations.
What’s in an RF Front End?
Across the industry, a great deal of design effort continues to be applied
to the RF front end, which conditions, amplifies and/or filters the
outgoing and incoming signals that contain the information stream.
This part of the communications device is the most critical part of
the receiver, and it is generally considered to include all the circuitry
between the antenna and the baseband.1 Figure 1 shows a block
diagram of a typical transmit/receive front end for a Wi-Fi system,
and the necessary circuitry to take the signals from the antenna and
process them for input into an analog-to-digital converter (ADC). The
signals are then passed to the digital circuitry or baseband transceiver
portion of the radio. RF front ends can include driver filters (which
filter out the spurious signals emanating from the transceiver); power
amplifiers (PAs); switches (for half-duplex solutions); duplexers (for
full-duplex solutions); output filters (which filter out the spurious
emissions from the PA); and low-noise amplifiers (LNAs).
Figure 1. Wi-Fi RF Front End
An RF front end, such as this one for Wi-Fi, contains all the analog circuitry between the antenna and
the baseband transceiver.
Finding the Optimal Integration Path
To address cost and size challenges, many are looking for the optimal
integration path for radios. One method is to combine the baseband transceiver and the RF front end in a single SOC. Though this
approach aims to optimize the integration path, CMOS PAs and
analog filters integrated onto the dense CMOS technology platform
have shortcomings such as high current consumption (which relates
to efficiency and current drain), low output power, higher loss and
rapidly degrading performance at higher frequencies.
Cost savings with this approach can also be limited. For instance,
there is a very high mask cost for a pure digital chip, and the SOC
development budget is jeopardized when analog is added to the CMOS
design because of the complexities of spurious signals, parasitics and
interference in the analog section, which will likely need to be respun
(Figure 2a). Also, in a pure CMOS design, the PA is realized using a
very dense array of CMOS transistors that are more prone to defect
density, which threatens yield (as compared to the predictable process
for the baseband circuitry).
In terms of size, it may seem intuitive that integrating the RF
front end into the CMOS baseband would dramatically improve
the system footprint. In reality, with a decrease in circuitry size, it
is necessary to have a fixed periphery of transistors to deliver high
output power at a fixed voltage. The progression to finer CMOS
nodes necessarily requires shrinking voltage rails. However, using
low-voltage rails also means reduced voltage swing (which relates to
signal level). So in effect, a smaller RF signal is more susceptible to
noise. Therefore, to retain the same power performance, the size of the
PA must increase to compensate. For example, SOCs with integrated
RF circuitry have been demonstrated with limited performance using
65-nanometer CMOS, but one can expect the performance of the RF
front end to deteriorate significantly if and when that design ports
to 45-nanometer. The bottom line is that the size of the PA does not
shrink, and in fact might need to grow.
Despite these challenges, many designers have increased their efforts
to integrate some, or all, of the RF front-end functions into the baseband
transceiver for an entire SOC. Integrating the PA in CMOS has proven
to be a good fit for some low- and medium-output power applications
such as Bluetooth or single-stream 802.11b/g wireless LAN. These
devices tend to have a need for lower output power and tolerate lower
power-added efficiency (higher power consumption) and degraded
performance at higher frequencies, all of which can be acceptable for
some applications, but would be huge trade-offs for mobile wireless
devices. As a result, integrating the RF front end with the baseband
transceiver is not an optimal fit for direct-to-battery (handset) or high-output
power, multi-stream technology, which will likely retain the RF
front-end circuitry separate from the baseband transceiver.
Figure 2. Cost Breakdowns for Semiconductor Processes
(a)
(b)
(a) Costs associated with migrating to smaller CMOS nodes. (b) Comparison of the costs for various
front-end technologies.
Optimized RF Front Ends
A variation of the SOC approach is to take a system approach to
the entire front end using technology that is optimized for front-end
applications. This type of device could be called an RF SOC. As
compared to the multi-chip RF front-end module (FEM) that is in
use today, the RF SOC would be the next evolutionary step, and it
could offer advantages in assembly, test, size and cost. The promise
offered by an RF SOC has it rapidly emerging as the technology of
choice to address high-density, multi-mode front ends delivering high
levels of output power.
Selecting the best technology to create an RF SOC is crucial in
striking the correct balance of integration, cost and performance
(Figure 2b). SiGe BiCMOS technology is a strong contender. First,
silicon technology is less expensive than GaAs technology, so using
SiGe offers initial cost benefits. In addition, BiCMOS technology
allows for matching of the best transistor technology for various
applications. For instance, heterojunction bipolar transistors (HBTs)
can be used for the gain stages. Here, germanium doping of the
bipolar transistor results in performance that is comparable to GaAs
devices for high-frequency applications. Specifically, with SiGe,
output power levels up to +26dBm have been reliably demonstrated,
making the PA well suited for use in applications requiring high
output power such as WiMAX.2
For control logic, BiCMOS processing supports the use of CMOS,
and in the future, CMOS can also be used for the system’s transmit/receive (T/R) switches. Today, CMOS control logic can be used to
dynamically adjust the PA to improve battery life. For example, a
serial bus or three-wire interface (TWI) can allow for discrete bias
control of each gain stage in the PA. This approach permits the front
end to automatically increase amplification for higher performance
and data rates. It can also dial it back to save battery life when data
rates are lower, or it can bypass gain stages altogether when lower
output power performance is required in near-field conditions (such
as when the appliance is close to the basestation/access point). This
approach has been used in cellular technologies for years, but it has
not been rolled out in Wi-Fi or WiMAX applications. Now that there
are so many battery-operated devices using these access technologies,
the ability to optimize performance in real time is likely to become
more important.
Discrete bias control can offer another advantage, allowing a single
PA to function in a multi-use application, such as a multi-function
2GHz Wi-Fi/WiMAX/Bluetooth handset, where the re-use of a
single PA can reduce the overall size of the front end. In this example, software can be used to establish the appropriate PA settings at the beginning of each pulse, whether it is a Wi-Fi, WiMAX, Bluetooth
or cellular one.
With a SiGe BiCMOS process, it is also possible to integrate
analog passive devices, including metal-insulator-metal (MIM)
capacitors, interconnects, matching circuitry and filtering elements.
It is important to note that the SiGe matching circuitry is actually
on the die and is not a post-processing technology. Integrating the
complete front end (Figure 3) into the RF SOC reduces the generation
of spurious signals such as harmonics. As a result, designers can
eliminate the need for a grounded shield. This is a significant cost
and size savings.
The Future of RF Integration
A major requirement for the success of a RF SOC is to allow multiple
PAs on a single die without having the RF chains interfere with each
other. This requires good isolation, which has been challenging for
silicon to achieve. However, it is possible with SiGe, where using
recently developed novel isolation techniques results in reduced
harmonics. For instance, ~35dB of isolation has been demonstrated
between two front-end chains operating concurrently at +20dBm
(Figure 3). In the future, the industry can expect to see a RF SOC
combined in a multi-chip module (MCM) with a baseband transceiver
SOC, making MCMs simpler and more cost effective to implement.
Figure 3. A Block Diagram of an RF SOC
Using novel isolation techniques and integrated matching and filters, this SiGe RF SOC achieved
~35dB isolation between two front-end chains operating at +20dBm.
The use of SiGe BiCMOS technology offers the optimal balance
of cost, performance and size for multi-function portable or handheld
radios. By separating the RF front end from the baseband/transceiver,
the designer is free to continue migrating to smaller nodes. The
evolution of the RF SOC greatly simplifies the wireless radio’s active
component bill of materials, which invites the development of low-cost
system-in-package (SiP) solutions for complex radio needs.
About the Authors
Jose Harrison has 20 years experience driving new product and business
development in the semiconductor industry. Previously, Harrison served as business
line manager for Code Division Multiple Access (CDMA), transceiver and wireless
power amplifier products with IBM Microelectronics, where he managed the design
and production of SiGe power amplifiers for CDMA, Personal Communications
Service (PCS), Global System for Mobile Communications (GSM) and Digital
Cellular System (DCS) applications. Harrison has also held senior sales, product
and business development positions at Raytheon, Fairchild and American
Microsystems. Harrison holds a Bachelor of Science degree in engineering physics
from Santa Clara University and a Master of Business Administration from the
University of New Hampshire. You can reach Jose Harrison at jeh@sige.com.
Peter Gammel has worked with single-electron devices, superconducting devices,
and microelectromechanical systems (MEMS) and RF acoustic wave devices for
more than 20 years. He is well acquainted with the processes of intellectual property
investment, new product and funding development. Peter previously served as
VP of engineering at a venture-backed start-up, assembling and managing a
15-person team to develop RF acoustic wave products. He was chief technology
officer at both AdvanceNanotech Inc. and Agere Systems (analog products business
unit), and was a research director at Bell Laboratories. Peter has more than 200
referred technical publications and more than 25 patents issued and in process.
He holds a Ph.D. in physics from Cornell University and Bachelor of Science
degrees in physics and mathematics from Massachusetts Institute of Technology
(MIT). You can reach Peter Gammel at plg@sige.com.
Resources
1 Bowick, Chris. RF Circuit Design. Elsevier, Inc. 2008. p 185.
2 Brewer, John; Peter Gammel; and Darcy Poulin. “Wireless Everywhere? Not Quite Yet.” Mobile
Development and Design, September 2008.
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