Dr. Vincent Peiris, Section Head, RF and Analog IC Design, Microelectronics, CSEM
Pierre-François Rüedi, Project Manager, Sensory Information Processing, Microelectronics, CSEM
Dr. Dragan Manic, Section Head, Industrialization and Production, Microelectronics, CSEM
Simon Gray, Head of Business Acquisition, Microelectronics, CSEM
The design of a system-on-chip (SOC) in deep-submicron
CMOS is a challenging task for an IC designer because a variety
of analog, digital, mixed-signal and radio frequency (RF) blocks
must be embedded on a single die and function smoothly together. The
design challenge gets even more complex when it comes to achieving
ultra low-power capability for applications such as wireless sensor
networks (WSNs), which translates into low-current consumption
from supplies sometimes as low as 1V. For other applications such as
machine vision, the challenge consists in packing a maximum amount
of functionality within the SOC to benefit from miniaturization
while achieving improved speed at low-power levels.
This article addresses some of the design challenges for such SOCs
through three selected cases. First, an ultra low-power, 0.18-micron RF
SOC targeting WSNs is presented. It includes a 2.5mA dual-band RF
transceiver, a 50μA/MHz reduced instruction set computer (RISC)
microprocessor, a sensor acquisition chain and a power management
unit – all operating from a 1V supply. Second, a 0.18-micron SOC
for low-power machine vision is highlighted, integrating an ultrahigh
dynamic range quarter video graphics array (QVGA) pixel array
with a 50MHz 32-bit digital signal processor (DSP) and yielding a
power consumption of 80mW. Third, an insight into the potential
of microelectromechanical systems (MEMS) SOCs will be provided,
focusing on next-generation, miniature and low-power 2.4GHz radio
SOCs combining RF MEMS with CMOS.
read more
Meeting the Challenges of Small Radio Frequency ICs
Jose Harrison, Director, Product Marketing, Computing and Consumer, SiGe Semiconductor Inc.
Peter L. Gammel, Chief Technical Officer and Vice President, Engineering, SiGe Semiconductor Inc.
The latest communication devices incorporate multiple protocols
within a single appliance, often with incompatible frequency
bands and modulation schemes. Handsets, for instance, might
need to support cellular, Wi-Fi and Bluetooth, while computers may
need to handle Wi-Fi, cellular, Bluetooth and WiMAX signals. The
complexity of the multiple radio frequency (RF) signal chains in these
advanced designs is placing high demands on available technology
and requiring skillful engineering choices to adequately address issues
of size, battery life and cost without compromising performance.
In terms of semiconductor choices, designers of components for
advanced communications devices can choose to pursue a single
system-on-chip (SOC) design, which includes both the RF front end
(analog circuitry) as well as the baseband transceiver (digital circuitry),
or they can work using a two-chip solution that incorporates the
best of silicon CMOS circuitry for the digital realm and another
material, such as SiGe or GaAs, for the integrated RF circuitry. In
this approach, both SiGe and GaAs offer advantages for different
applications. A significant amount of research and development has
been conducted to advance SiGe processing and design techniques in
recent years, which has greatly improved its advantages for use in the
latest communication devices that need to deliver high output power
and support multiple protocols and frequencies.
read more
