American Semiconductor demonstrated
flexible CMOS using FleX™ Silicon-on-Polymer
(SOP™) technology. The unique FleX process is
a post-fab, low-cost method for production of
single-crystalline, <2000-angstrom, thin-body
CMOS on polymer. The process is in late-stage
development and may be a possible CMOS
solution for flexible electronic and display
applications.
American Semiconductor is a U.S. foundry
offering pure-play, on-shore foundry services
to suit customers' needs. Services include
FleX™ SOP™ technology; Flexfet™ advanced
CMOS technology; and custom fabrication for
non-standard wafer processing, novel process
integration or copy smart process replication.
For additional information, contact:
Rich Chaney
(T) 208-336-2773
(E) richchaney@americansemi.com
(W) www.americansemi.com
austriamicrosystems' business unit Full Service
Foundry announced its patented through-silicon
via (TSV) technology for foundry customers.
With TSV technology, two 8-inch wafers can be
electrically connected. With typical TSV depths
of 200μm to 300μm, it is especially targeting
three-dimensional (3D) integration of CMOS
ICs and sensor components. Due to its flexible
manufacturing concept, customer-specific
modifications as well as varying wafer thicknesses
can be supported.
The patented TSV technology addresses a
variety of markets demanding 3D integration of
CMOS ICs, photo sensors, gas sensors, power
devices or microelectromechanical systems
(MEMS) components such as automotive,
industrial and consumer applications. Foundry
customers using austriamicrosystems' TSV
concept immediately benefit from a significantly
reduced form factor, systems cost reduction
as well as performance improvements due to
shortened interconnect lengths. A proprietary
back-side re-distribution layer concept enables
various front- and back-side input/output (I/O)
pad connections and provides customers with the
utmost flexibility in IC and sensor arrangement.
For additional information, contact:
Ron Vogel
(T) 408-345-1790
(E) ronald.vogel@austriamicrosystems.com
(W) www.austriamicrosystems.com
Chartered Semiconductor Manufacturing is
delivering an enhanced version of its 65nm low-power
process called 65nm LPe. The new 65nm
LPe process utilizes innovative leakage reduction
techniques to significantly improve system-on-chip
(SOC) standby power consumption by up
to 50 percent. A full suite of intellectual property
(IP) is available for the new process. Chartered
has also worked with several of its partners
to offer a robust 65nm radio frequency (RF)
platform specifically geared for development
of single-chip RF products. The Chartered
offering, jointly developed with IBM, is based
on Chartered's enhanced 65nm LPe process and
includes an IBM RF physical design kit.
For additional information, contact:
Tiffany Sparks
(T) 408-941-1185
(E) tiffanys@charteredsemi.com
(W) www.charteredsemi.com
Pioneering the open foundry business model
in China since 1997, CSMC Technologies is
a leading pure-play specialty analog foundry
providing fabless design houses and integrated
device manufacturers (IDMs) with 6-inch and
8-inch manufacturing services.
CSMC's Fab 2 commenced 8-inch wafer
production with emphasis on high-voltage
analog, mixed-signal and power processes in
2008. Potential analog products can be utilized
in a broad range of end market applications,
including consumer electronics, communications
devices, computer peripheral equipment and
automotive. The target capacity of Fab 2 is
30,000 8-inch wafers per month in early 2010,
with process technologies advancing to the
0.13μm node.
For additional information, contact:
Jessie Shen
(T) 86-510-88113349
(E) shenj@csmc.com.cn
(W) www.csmc.com.cn
Fujitsu Microelectronics America (FMA), a
leading wafer foundry and application-specific
IC (ASIC) service provider, offers world-class
semiconductor solutions to fabless and system
companies. Based on its advanced CMOS
processes and application-optimized design IP,
Fujitsu's technology platforms are available from
the 180nm to 65nm nodes to customer-owned
tooling (COT) customers.
For customers who prefer a full-service
engagement model, FMA provides complete
turn-key ASIC services for quick time-to-revenue.
Fujitsu's technical experience, design
expertise and complex packaging capabilities
are keys to its long track record of consistently
delivering first-pass success in SOC development
and production.
For additional information, contact:
David Fung
(E) dfung@fma.fujitsu.com
(W) www.fujitsu.com
Jazz Semiconductor, a Tower Group
Company, attained quality automotive
certification and announced that all Tower/Jazz
facilities have now achieved world-class quality
standards in the automotive, environmental
management, health and safety, and information
security markets.
Jazz and Xceive announced volume
production of silicon tuners for flat-panel TVs.
These silicon tuners have been adopted by LG for its liquid crystal display (LCD) and plasma
TVs.
The University of California, San Diego
(UCSD) announced it leveraged Jazz's high-speed
SiGe process to develop a two-antenna,
quad-beam, 11–15GHz phased array RFIC
targeted for satellite systems and advanced
radars, replacing eight GaAs chips while
lowering cost and increasing integration.
Jazz released its DIRECT multi-project
wafer (MPW) program to enable rapid design
verification and faster time-to-market. In
addition, Jazz joined the Cool Planet project
to increase the efforts of the company's "green"
operations, reducing its carbon footprint and
energy use.
For additional information, contact:
Melinda Jarrell
(T) 949-435-8181
(E) melinda.jarrell@jazzsemi.com
(W) www.jazzsemi.com
Peregrine Semiconductor, a leading supplier
of high-performance RF CMOS and mixed-signal
communications ICs, and MagnaChip
Semiconductor, a leading Asia-based designer
and manufacturer of analog and mixed-signal
semiconductor products for high-volume
consumer applications, completed the final
qualification phase in the process technology
transfer of Peregrine's UltraCMOS silicon-on-sapphire
(SOS) technology to MagnaChip's
Cheongju wafer manufacturing facility.
Peregrine and MagnaChip began the final
qualification phase of the technology transfer
in July 2008 and released it to production
recently. The 10-month qualification cycle of
UltraCMOS technology is exceptionally short
due to its standard CMOS foundation.
For additional information, contact:
Charlie Yang
(T) 82-2-6903-5844
(W) www.magnachip.com
SilTerra Malaysia Sdn. Bhd. partnered with
Hong Kong-based South Sea Semiconductor
to develop a new breed of power metal-oxide
semiconductor field-effect transistor (MOSFET)
technology for highly efficient low RDS(on)
devices used in Li-ion battery pack direct
current-direct current (DC-DC) converters for
notebooks. The V-Tr FET technology features a
narrow trench gate electrode with a cell density
of 488 million per inch square. The technology
is realized using an existing production-ready
0.16μm toolset. Both 20V P-channel and 20V
N-channel devices are developed using this V-Tr
FET technology which delivers competitive low
RDS(on) at 3.4A with a small outline transistor
(SOT)-23 package and 6.0A with a thin-shrink
small outline package (TSSOP)-8 package,
respectively. The technology is currently in mass
production and has already been offered to
several power management customers.
For additional information, contact:
Meng Kong Koh
(T) 604-401-4166
(E) mengkong_koh@silterra.com
(W) www.silterra.com
The U.S. photovoltaic (PV) market (i.e.,
solar cells) is ready to expand, with emerging
opportunities plus access to economic stimulus
funding. However, to enter production with
new PV products, both start-ups and established
companies need access to capital equipment
and cost-effective, complete development
solutions. SVTC Technologies, in a newly
expanded partnership with Roth & Rau, a
world-leading solar equipment manufacturer
based in Germany, is establishing the Silicon
Valley Photovoltaic Development Center.
This center will offer a world-class 30MW PV
production line and a full range of low-cost
development services designed to accelerate the
commercialization of new PV technologies.
For additional information, contact:
Ashwin Kumar
(T) 512-356-2312
(E) ashwin.kumar@svtc.com
(W) www.svtc.com
Taiwan Semiconductor Manufacturing
(TSMC) unveiled two unified electronic design
automation (EDA) data formats for 40nm
process technology—interoperable design rule
check (iDRC) and layout-versus-schematic
(iLVS). Along with this, TSMC also released
the semiconductor industry's first interoperable
process design kit (iPDK) for advanced
technology. The kit is fully validated on TSMC's
65nm process and focuses on enhancing
innovation in custom/analog/mixed-signal/RF
designs.
These initiatives are part of TSMC's Open
Innovation Platform™ (OIP), a platform
that promotes the speedy implementation
of innovation among TSMC customers and
ecosystem partners.
Established in 1987, TSMC is the world's
largest dedicated semiconductor foundry. As
the founder and leader of the dedicated foundry
business, TSMC has built its reputation
on providing advanced wafer production
processes and unparalleled manufacturing
efficiency. From its inception, TSMC has
consistently offered the foundry segment's
leading technologies and TSMC-compatible
design services to its customers. The company's
total managed capacity exceeds eight million
8-inch equivalent wafers, while its revenues
represent approximately 50 percent of the
dedicated foundry segment. TSMC became the
first semiconductor foundry seven years ago to
enter the ranks of the top 10 IC companies in
worldwide sales. According to an IC Insights
report, TSMC ranked number five in worldwide
sales in 2008.
For additional information, contact:
Ferda Mehmet
(T) 415-308-7877
(E) fmehmet@ar-edelman.com
(W) www.tsmc.com
Tower Semiconductor announced it is the
first foundry with magnetoresistive random
access memory (MRAM) capability and will
manufacture next-generation MRAM from
Crocus Technology. Tower will also hold an
equity position in Crocus.
In addition, Tower announced an industry-first scalable RDS(on) versus breakdown voltage
design kit technology (TS18PM) to enable 10–40 percent smaller die sizes and faster design
cycle times targeted at the growing power
management market.
Tower also collaborated with Panavision
to produce the world's fastest single-port reconfigurable linear image sensors to address
many applications in the consumer, industrial,
automotive and scientific markets.
Tower and its subsidiary Jazz Semiconductor
announced the call for papers for its 2009
Analog-Intensive Mixed-Signal Circuits,
Applications and Technology (AIMS-CAT)
conference on November 5, focusing on the
latest advances in SiGe, RF CMOS, bipolar/CMOS/DMOS (BCD) and CMOS image
sensor (CIS) process technologies.
For additional information, contact:
Melinda Jarrell
(T) 949-435-8181
(E) melinda.jarrell@tower-usa.com
(W) www.towersemi.com
United Microelectronics (UMC) and
Magma Design Automation introduced an
integrated low-power IC reference flow for the
foundry's advanced 40nm process. Based on
the Magma Talus IC implementation system
and fully compliant with the Unified Power
Format (UPF), it allows designers to address
low-power nanometer design considerations
during implementation and within a single
environment, maximizing quality of results
(QoR) while reducing turnaround time.
UMC has also worked with SpringSoft
to introduce a Laker PDK for UMC's 65nm
technology. The PDK includes device symbols,
highly optimized parameterized cells (i.e., Laker
MCells), pre-validated design rules and the
latest technology files.
For additional information, contact:
Richard Yu
(T) 886-2-2700-6999 ext. 6951
(E) richard_yu@umc.com
(W) www.umc.com
