The Convergence of Home, Office and Mobile Networking
Dave Kelf, President and Chief Executive Officer, Sigmatix Inc.
The explosion of powerful, multi-purpose wireless devices has
created a plethora of unremitting challenges for next-generation
wireless protocol implementation. The number of users and
mobiles devices is staggering. Just consider the fact that the number of
subscribers on the mobile Internet has increased to 60 million in less
than two years, with social media-capable smartphones serving as the
big wireless driver. By 2012, more than two billion cell phones will
be in use, or one phone to every 3.5 people. The market is bifurcating
into low-cost phones under $20 on one end and smartphones with
increasingly diverse features on the other.
According to the CEO of Verizon, the demand for mobile
devices, in general, is insatiable. Each consumer will own eight to 10
mobile devices—from phones to media centers, in-car devices, home
automation and so on—that will require their own channel to the
Internet. The emerging fourth-generation (4G) standards will enable
many new wireless services and implementations, while providing
the much needed boost in capacity.
Communications carriers have promised Long-Term Evolution
(LTE) broadband wireless access as early as 2010 to meet demand
pressures, and are also experimenting with new business models
tuned to broad device usage scenarios. Couple these innovations
with an increase in smaller cell size base stations such as femtocells,
and the opportunity exists to drive the wireless interconnected
world. Convergence in wireless device implementation has become a
necessity and requires a transformation in the development platform.
Traditional baseband implementations, based primarily on expensive,
risky and inflexible custom silicon components, create huge barriers
to advancement. It can take up to five baseband processors per device,
one for every protocol. If the protocol changes or requires a fix, a new
$50 million plus device redevelopment is required. It is time to make
use of software solutions that provide the required economies of scale
and design flexibility to bring development costs and risks into line.
Software defined radio (SDR) for baseband processing, initially
viewed as breakthrough technology when first proposed in 1991,
can provide the required operational flexibility and simplified
development, and is an easy path to multimode protocol execution
on a single device. However, in the past, SDR has not been able to
provide the necessary performance-to-power consumption trade-off
for wireless devices, limiting its applicability. New vector processors
are set to transform this situation, and with it create a massive
dislocation in baseband development, in general.
Figure 1. The Baseband Physical Layer is the Last Barrier to
Fully Programmable Radio
Vector Processing Enabling Next-generation SDR
The oft-cited Moore's Law of semiconductor design that posits that
silicon performance doubles every 18 months is now showing signs of
obsolescence as the cost of fabrication technology advancements have
skyrocketed. Processor design teams can no longer rely on silicon
improvements to create a boost in execution efficiency. To maintain
their promised performance roadmaps and drive differentiation,
they have reverted to a range of parallel architectures that have the
potential, if programmed correctly, to eliminate the gap between
processor and custom silicon performance.
Of the various parallel enhancements, the use of combined wide
single instruction, multiple data (SIMD) and very long instruction
word (VLIW) pipelines to drive vector processing with enhanced
energy efficiency holds the promise for software-based systems to
meet or exceed custom hardware performance. By programming
these devices with a high degree of optimization so as not to waste
even a single clock cycle or storage location, baseband processors
may be created that meet the stringent requirements of the compute-intensive
LTE standard.
Figure 2. New Vector Processors Feature Multiple Levels of
Parallelism
SDR has been transformed into multimode vector radio (MVR),
the next generation in software-defined wireless systems with the
required flexibility to meet modern device requirements and the
performance profile necessary for 4G.
Standards organizations such as the Third-Generation Partnership
Project (3GPP) continue to drive revisions in the protocols. This
makes it harder for hardware developers who try to get a jump on
the market by picking a standard version that may be the wrong one
or superseded before a custom device investment has been realized.
Software definitions allow for a common hardware platform to be
reused for multiple standards, eliminating this issue for a specific
range of standard enhancements.
The cost of development and the return on that investment is also
a factor. Let's do the math. Consider that approximately 200 million
smartphones will be sold in 2010. A custom baseband device for
one standard typically requires $50 million in investment funding.
If that device garners an optimistic 5 percent market share, that's
approximately $5 per unit. If a processor platform can be used for
multiple standards and potentially other uses, it can command up to
five times this number. If its lifecycle is longer than a custom chip,
then this can increase its value another two to three times. The return
on investment case for a processor-based system, even with the cost
of software development, is dramatically improved.
The biggest advantage of MVR for handsets and other devices
could well be associated with multimode operation. With modern
handsets often containing one to three cellular baseband processors,
plus Wi-Fi, Bluetooth and Global Positioning System (GPS) devices,
a universal device approach would simplify the systems. A well-designed
software platform can cover these various standards and
may solve the issues of the handover between different standards
which are so complex between multiple chips.
The Performance Programming Challenge
Programming digital signal processors (DSPs) and compilers is a
difficult challenge. DSPs often require hand coding and are hard to
program at the assembly level. Specialized parallel devices further
compound this challenge by adding another layer of complexity,
making it hard for engineers to efficiently deal with, particularly
given the time-to-market constraints imposed by market forces.
Generic hand-coded libraries, previously seen as part of the solution,
are difficult to leverage for 4G wireless designs, as they lack the
flexibility required to optimize complete channels of functionality,
leaving vital performance optimizations on the table.
Relying on compiler advancements to provide required
optimization in this parallel world will lead to disappointment and
further schedule and resource overruns. Compilers have fundamental
limitations that make their use sub-optimal as the only tool for faster
design. Compilers are designed to exactly reproduce the functionality
of code fed into them, leaving little room for designer intuition for
short cuts and waste reduction that might be achieved. Compilers
often do not take into account a complete multi-processor sub-system
because they do not allow for algorithms to be spread across
heterogeneous processor cores to leverage the optimal processor
architecture for each one. And they work poorly around available
memory architectures and communication structures.
Compilers need higher level system direction from a source with
a heuristic understanding of the algorithm set to be leveraged. This is
particularly important for vector processing, where critical decisions
on processor usage have dramatic effects on performance. This source
could be human intervention, but given modern complexity, a form
of automated, algorithm-specific, system-direction capability affords
great benefit to the engineering team.
New MVR technology offers the versatility of SDR with the
performance of custom hardware for a range of wireless applications.
Coupled with advanced system tooling, MVR can be made portable
and programmable such that the business needs of platform providers
can be easily met, allowing processor versatility and advanced
algorithm inclusion.
As a software baseband platform, it is flexible and portable enough
for use in either the infrastructure or device applications, and enables
multi-standards in one device. With a MVR baseband, design teams
can simplify development, increase speed and performance, and
lower power consumption in mobile devices. Most importantly, the
advantages of SDR—multimode operation, execution versatility
and dynamic functional upgrades, along with cost, risk and time-to-market
reductions—have been retained.
To achieve the performance-to-power consumption ratio of
custom hardware, MVR considers data blocks as vector patterns that
can be processed together using various parallel mechanisms. It uses a
four-dimensional parallel programming model that includes:
- Data parallelism using SIMD pipeline architectures, where a
wide pipeline is broken up into individual lanes that execute
separate data words with the same instruction.
- Instruction parallelism based on VLIW multistage pipelines,
where, during any one clock cycle, a number of instructions are
executed at the same time.
- Homogenous multicore, where a number of the pipeline cores
are run in parallel, each executing a different process or part of
the same process.
- Heterogeneous multicore, where homogeneous cores are
combined with parallel processors of different types (e.g., scalar
processors and co-processing accelerators) and each is leveraged
on processing tasks that suit their architecture.
The operation of a MVR baseband is storage-centric, where
memory writes are minimized. Once a carefully sized data block is
loaded into memory, as many operations as possible are performed
on it using careful execution flow control.
Think of the applications for MVR. In a multimode operation,
several baseband chips or devices could be replaced by one
configurable component on a handset. A consumer electronics device
could benefit from wireless connectivity by using its main processor
for baseband execution instead of a separate chip. Or a base station
or femtocell could adjust itself, even in the field, to load a standard update.
The defense communications waveform could be based on an industry standard if a
customizable implementation of it was available.
Conclusion
A universal device approach would significantly simplify cellular
handsets. The idea of replacing risky, expensive and time-consuming
custom hardware with a configurable processor platform has major
implications for wireless design and development.
Next-generation wireless mobile technology known as MVR
is an enabling solution for multiple products and applications
with the potential to drive a dislocation in an exploding industry.
This could mean that a dream is realized within modern wireless
business constraints: Every electronic device will have access to the
information it needs, when it needs it.
About the Author
Dave Kelf is the president and chief executive officer of Sigmatix Inc. After
a number of years in DSP and communications semiconductor engineering
roles at Plessey and Nortel, Kelf worked in sales and marketing at Cadence
Design Systems, most recently responsible for the successful Verilog and
very high-speed IC hardware description language (VHDL) verification
product line. As vice president of marketing at Co-Design Automation
and then Synopsys, Kelf oversaw the successful introduction and growth of
the SystemVerilog language, before running marketing for Novas Software
(now Springsoft). He holds a Master of Science in microelectronics and an
MBA. You can reach Dave Kelf at davek@sigmatix.com.
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