austriamicrosystems recently celebrated the 4th anniversary of high-volume production of
its best-in-class 120 V 0.35 μm high-voltage CMOS process. Successfully introduced
already in May 2006, foundry customers benefit from a fully qualified, high-volume
production-proven and mature high-voltage CMOS technology ideally suited for emerging
applications such as sensor interfaces, power-over-Ethernet (PoE), motor controllers and a
variety of automotive applications.
The H35 specialty foundry technology allows the integration of 3.3 V, 5 V,
20 V, 50 V and 120 V n-type metal-oxide semiconductor (NMOS) and p-type metal-oxide
semiconductor (PMOS) devices on a single chip without any process changes.
H35 is the first purely CMOS-based high-voltage foundry process that matches bipolar/CMOS/DMOS (BCD) performance and chip sizes at much lower process complexity.
Rigorous modularity permits 100 percent reuse of low-voltage CMOS design intellectual
property (IP). Offering fully scalable high-voltage NMOS and PMOS devices, floating
logic libraries as well as a best-in-class power-on resistance makes the 120 V high-voltage
CMOS technology a compelling solution for fabless design houses and integrated device
manufacturers (IDMs).
For additional information, contact:
Ron Vogel
(T) 408-345-1790
(E) ronald.vogel@austriamicrosystems.com
(W) www.austriamicrosystems.com
Synopsys, a world leader in software and IP for semiconductor design, verification and
manufacturing, and GLOBALFOUNDRIES, a leading provider of advanced semiconductor
technology and manufacturing services, announced an agreement to develop the
Synopsys DesignWare SuperSpeed Universal Serial Bus (USB) 3.0, USB 2.0, High-Definition Multimedia Interface (HDMI) 1.4 transmitter (Tx) and receiver (Rx), double
data rate (DDR)3/2, Peripheral Component Interconnect (PCI) Express 2.0 and 1.1, Serial
Advanced Technology Attachment (SATA) 1.5/3 Gbps and 6 Gbps, and Attachment
Unit Interface (XAUI) physical layer (PHY) IP for GLOBALFOUNDRIES' 28 nm gate-first
high-k metal gate (HKMG) process technologies. The collaboration will enable
mutual customers to differentiate their 28 nm designs with a high-quality IP portfolio
targeted at next-generation electronic system-on-chips (SoCs). The long-standing
relationship between the two companies has resulted in the successful development of
DesignWare PHY IP from 180 nm to 32 nm process technologies. GLOBALFOUNDRIES
and Synopsys are the first to announce the development of USB, PCI Express, DDR,
HDMI, SATA and XAUI PHY IP targeting 28 nm process technologies with scalability to
future generations.
For additional information, contact:
(T) 408-462-3900
(E) global.sales@globalfoundries.com
(W) www.globalfoundries.com
MagnaChip Semiconductor, an Asia-based designer and manufacturer of analog
and mixed-signal semiconductor products, announced that it now offers an enhanced
process design kit (PDK) for 0.18 μm and 0.35 μm BCD technology which has been
receiving industry-wide attention. The latest PDK features major advancements from three
key perspectives: user environment, PDK content and design support. More specifically,
functions such as a one-click download, PDK installer and auto-version matching enable
rapid automatic setup of PDK conditions, creating a user friendly environment. A layout
utility is also provided to support global net connection, seal ring and guard ring.
For additional information, contact:
Robert Pursel
(T) 408-625-1262
(E) robert.pursel@magnachip.com
(W) www.magnachip.com
Samsung Foundry qualified the industry's first 32 nm high-k metal gate low-power (HKMG
LP) process in May 2010, an optimized solution for customers' next-generation mobile
and consumer products. Designers now can access this advanced leading-edge technology
with proven IP and standard cell libraries in their development of advanced products.
Volume production of 32 nm HKMG process products is scheduled for the beginning of
2011.
Samsung Electronics' foundry business is dedicated to supporting fabless companies
and IDMs by offering full-service solutions, which encompass design kits and proven IP to
full turnkey manufacturers, to achieve market success with advanced IC designs through
foundry, application-specific IC (ASIC) and customer-owned tooling (COT) engagement.
Samsung Foundry focuses on leading-edge process technology from 90 nm and below,
and is currently in mass production at 45 nm and preparing next-generation 32 nm, 28 nm
and beyond process technologies.
For additional information, contact:
Timothy Kwon
(T) 82-31-209-6024
(E) foundry@samsung.com
(W) www.samsung.com/foundry
Virage Logic, the semiconductor industry's trusted IP partner, and Semiconductor
Manufacturing International (SMIC), the leading foundry in China, announced the
extension of their longstanding partnership in 40 nm low-leakage (LL) process technology.
Building on the successful partnership that was initially established with 130 nm process
technology, Virage Logic and SMIC have collaborated to provide mutual customers
with highly differentiated IP for a broad range of SMIC's process technologies including 90
nm and 65 nm. Under the terms of the new agreement, SoC designers will have access to
Virage Logic's SiWare memory compilers, SiWare logic libraries, SiPro Mobile Industry
Processor Interface (MIPI) and Intelli DDR IP on SMIC's advanced 40 nm LL process.
In addition, one key provision of this new agreement provides SMIC access to Virage
Logic's advanced STAR memory system and STAR yield accelerator tools to accelerate the
development, testing and yield enhancement of its 40 nm LL memory-related technology.
For additional information, contact:
(T) 86-21-3861-0000
(E) webmaster@smics.com
(W) www.smics.com
SilTerra Malaysia is a proud winner of the Product Excellence Award 2009, which was
given by the Ministry of International Trade and Industry (MITI) of Malaysia. This award
recognizes SilTerra's leadership position and innovation in high-voltage technology for
single-chip display driver ICs used in display panels of digital still cameras, feature phones
and smartphones.
SilTerra has been continuously investing in research and development (R&D) activities
to enhance its technology competitiveness. New technology such as 180 nm BCDMOS
and 180 nm V-Tr MOS technology was introduced for customers to design-in for
power management applications used in light-emitting diode (LED) drivers, motor
drivers, direct current-direct current (DC-DC) converters, lithium battery chargers
and more. These technologies are developed for energy-efficient power management
applications, which is inline with global green initiatives.
For additional information, contact:
Meng Kong Koh
(T) 604-401-4166
(E) mengkong_koh@silterra.com
(W) www.silterra.com
In June 2010, Taiwan Semiconductor Manufacturing (TSMC) reached an
important milestone in the company's pledge to expand investment in Taiwan. This
was achieved through the groundbreaking ceremony in Taichung's Central Taiwan
Science Park for Fab 15, TSMC's third 12-inch (300 mm) Gigafab.
Fab 15 will be TSMC's third Gigafab, or fab with capacity of more than 100,000
12-inch wafers per month, and will also be TSMC's second Gigafab equipped for
28 nm technology. This will be TSMC's next "green fab" following Fab 12 and
Fab 14, incorporating green concepts in energy conservation and pollution control
in its design, including a process water conservation rate of 85 percent, reclamation
of rainwater, recirculation and reuse of general exhaust heat, and development of
solar power generation and LED lighting applications. TSMC's goal is to reach zero
emissions of greenhouse gases.
TSMC is scheduled to begin equipment move-in for the Phase 1 facility in June 2011,
with volume production of 40 nm and 28 nm technology products for customers in Q1
2012. Construction will be divided into four phases, and total investment over the next
several years is expected to exceed NT$300 billion.
TSMC is the world's largest dedicated semiconductor foundry, providing the
industry's leading process technology and the foundry's largest portfolio of process-proven
libraries, IP, design tools and reference flows. The company's total managed
capacity in 2009 exceeded 10 million 8-inch equivalent wafers, including capacity from
two advanced 12-inch GigaFabs, four 8-inch fabs, one 6-inch fab, TSMC's wholly owned
subsidiaries WaferTech and TSMC China, and its joint venture fab Systems on Silicon
Manufacturing (SSMC). TSMC is the first foundry to provide 40 nm production
capabilities. Its corporate headquarters are in Hsinchu, Taiwan.
For additional information, contact:
Ferda Mehmet
(T) 415-308-7877
(E) ferda.mehmet@edelman.com
(W) www.tsmc.com
TowerJazz announced its 5th annual customer-focused technology conference—the TowerJazz Global Symposium (TGS)—to be held October 28, 2010 at its Newport
Beach facility. TGS will focus on design enablement and will feature an industry
outlook keynote from Gartner.
The company also announced its expanded business relationship with Vishay
Siliconix to include increased production of its high-voltage power metal-oxide
semiconductor field-effect transistors (MOSFETs) and super junction FET power
MOSFETs.
TowerJazz was selected by Tego to manufacture its high-memory radio frequency
identification (RFID) chips to be used by Airbus for improved aircraft maintenance
and logistics. In addition, Canesta chose TowerJazz for its CMOS image sensor (CIS)
technology to manufacture 3-D image sensors for consumer desktop computing, TV
and entertainment applications.
TowerJazz also announced its further momentum in Korea with its global
technology symposium and participation at the Institute of Electrical and Electronics
Engineers (IEEE) International Memory Workshop to present its industry-leading
non-volatile memory (NVM) technology.
For additional information, contact:
Melinda Jarrell
(T) 949-435-8181
(E) melinda.jarrell@towerjazz.com
(W) www.towerjazz.com
United Microelectronics (UMC) has partnered with Elpida and PTI to develop
a fully integrated through-silicon via (TSV) solution suitable for a wide range of
applications. Leveraging UMC's leading-edge logic technology and logic design
interface with Elpida's dynamic random access memory (DRAM)/TSV technology
and PTI's packaging and testing, this joint development project will allow UMC to
provide foundry customers with a total solution for their 3-D IC designs that
includes logic + DRAM interface design, TSV formation, wafer thinning, testing
and chip stacking assembly. The resulting technology is expected to help fabless
customers increase cost competitiveness, improve logic yield impact and accelerate
entry into the 3-D IC market.
For additional information, contact:
(T) 886-3-578-2258
(E) sales@umc-usa.com
(W) www.umc.com
X-FAB recently announced the industry's first 100 V high-voltage 0.35 μm pure-play
foundry process. It enables a new class of reliable, high-performance battery
monitoring and protection systems for battery management. It is also ideal for power
management applications and for ultrasonic imaging and inkjet print head apps using
piezoelectric drivers. In addition, X-FAB added new and enhanced N- and P-type
double-diffused metal-oxide semiconductor (DMOS) transistors with 45 percent lower
on-resistance for multiple operating voltages up to 100 V, lowering the silicon footprint by
up to 40 percent and thus reducing die costs. Other device enhancements include Schottky
diodes, 20 V and 100 V high-voltage capacitors, and bipolar transistors.
For additional information, contact:
Anja Noack
(T) 49-361-427-6162
(E) anja.noack@xfab.com
(W) www.xfab.com
