E-System Design released Sphinx for Signoff, the company's signal and power integrity co-simulator, at Design Automation Conference (DAC) 2010. Over the past year, numerous customers have validated Sphinx's accuracy and simulation run times on advanced and complex structures that other commercial tools could not perform. Additional features include support for Windows 32/64 bit; support for DXF, MCM, BRD and SiP file formats; performance of quick "what if " analysis within Sphinx; support for vendors' capacitor libraries; viewing of meshed design before simulation, removing any doubt about what is being analyzed; scripting to achieve faster turnaround time for common operations; and performance of time domain analysis with an integrated and proven flow using IdEM Plus.

In addition, a new prototype tool for 3-D packaging structures (supporting all interconnects, wire bonds and through-silicon vias (TSVs)) capable of accurately extracting hundreds of interconnects was announced.

For additional information, contact:
Gene Jakubowski
(T) 678-296-3772
(E) ski@e-systemdesign.com
(W) www.e-systemdesign.com

Bill Martin
(T) 469-766-5127
(E) bill@e-systemdesign.com
(W) www.e-systemdesign.com

ICsense is an IC design house with core competence in analog, mixed-signal and high-voltage IC design. ICsense offers design services starting from building block design up to complete turnkey application-specific IC (ASIC)/system-on-chip (SoC) solutions, excelling the state-of-the-art for the automotive, medical, industrial and consumer markets. The company delivers innovation and high complexity at reduced risk, and its mission is to be the number one partner for innovative mixed-signal and high-voltage IC developments. ICsense offers high quality through a highly skilled expert engineering team, a structured IC design methodology, International Organization for Standardization (ISO) 9001:2000 certified quality procedures and close cooperation with its customers and partners.

ICsense has key IC design experience in power management, high-voltage IC design, drivers, microelectromechanical systems (MEMS), sensor and actuator interfacing ICs, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), timing circuits and ultra low-power design.

ICsense provides customer-specific ASIC turnkey solutions from idea to final product, including feasibility study, system definition and modeling, design, layout, prototyping, prototype testing, production test and assembly coordination.

For additional information, contact:
Wim Claes
(T) 32-16-589700
(E) sales@icsense.com
(W) www.icsense.com

Mentor Graphics released three new products for IC physical design in Q2 2010. The Calibre InRoute design and verification platform enables designers to natively invoke Calibre tools within the Mentor Olympus-SoC place-and-route system to achieve true manufacturing closure during physical design. It significantly reduces time to closure by automatically detecting and fixing design rule checking (DRC) violations and making design-for-manufacturing (DFM) enhancements while optimizing for area, timing, power and signal integrity.

Calibre xACT 3-D is a new parasitic RC extraction solution that solves the traditional dilemma of extraction accuracy versus performance by providing a true deterministic field solver with the performance of rule-based production extraction tools. The tool provides accuracy within 5 percent and runtime at least two orders of magnitude faster than traditional field solvers.

Calibre Pattern Matching replaces lengthy and multi-operational text-based design rules with an automated visual geometry capture and compare process that significantly reduces rule deck size and improves congruence between the original intent of the design specification and its implementation.

For additional information, contact:
Gene Forte
(T) 503-685-1193
(E) gene_forte@mentor.com
(w) www.mentor.com

MIPS Technologies is the embedded processor leader in the digital home with a strong presence in networking. Now MIPS is entering the mobile handset market enabled by two main inflection points: Android and 4G. Previously there was a barrier to entry for MIPS in mobile handsets because the operating system (OS) was tied to the processor, but Android removes that barrier. And since consumers now expect access to high-definition (HD) multimedia content anywhere, anytime and from any source, high-bandwidth 4G data networks are needed to move content rapidly between devices. The MIPS architecture excels at moving large amounts of data quickly. Since MIPS cores are small, more of them can fit on a die—three multi-threaded MIPS cores can fit into the area of two single-threaded cores from the competition! This leads to increased performance at lower power consumption—a necessity for next-generation mobile designs. MIPS is engaging with key providers of software, middleware and complementary intellectual property (IP) to provide customers with choices and design differentiation. Based on recent design wins, MIPS-based mobile handset chips should arrive in 2011.

For additional information, contact:
(T) 408-530-5000
(E) info@mips.com
(W) www.mips.com

Mixel, the leader in mobile mixed-signal IP, announced the availability of MXL-SRDS-SGMII, a Serial Gigabit Media Independent Interface (SGMII) serializer/deserializer (SerDes) implemented in digital CMOS technology. The SerDes IP offers a data transfer rate of 1.25 Gbps for both upstream and downstream direction, meeting the Cisco GMII standard.

Mixel is a leading provider of mixel-signal IP cores to the semiconductor and electronics industries. Mixel’s mixed-signal IP portfolio includes high-performance physical layers (PHYs), SerDes, transceivers, phase-locked loops (PLLs), delay-locked loops (DLLs) and analog building blocks, which are used in mobile applications such as Mobile Industry Processor Interface (MIPI), Mobile Display Digital Interface (MDDI), networking and storage.

For additional information, contact:
Wafa Hannaoui
(T) 408-942-9300 ext. 115
(E) whm@mixel.com
(W) www.mixel.com

Novocell Semiconductor is the reliability leader in antifuse non-volatile memory (NVM) products and the only supplier of 2nTP, the first multi-time write antifuse device. Novocell's SmartBit technology allows 2nTP to be programmed two, four or eight times while saving users approximately 60 percent of the area used when cascading multiple one-time programmable (OTP) memory blocks. This month Novocell is releasing an enhanced version of its silicon-proven NovoBlox OTP technology. This release provides a high-density solution with significant area reductions. The enhanced blocks for a comparable size will be four times denser than the original NovoBlox—a 70 percent smaller footprint.

For additional information, contact:
Claire Parker
(T) 724-983-0600
(E) claire@novocellsemi.com
(W) www.novocellsemi.com

Oracle provides industry-leading business solutions for the semiconductor industry based on best-of-breed applications; middleware; and open, standards-based technology. Oracle's supply chain solution helps semiconductor companies achieve accurate consensus forecasts, optimized inventory leveling and postponement strategies, faster planning cycles and superior on-time delivery.

Oracle helps synchronize customers' entire supply chain by providing real-time engineering and bill of materials (BOM) changes to suppliers and design partners, and a central repository for all product data providing access through supplier portals. Workflows for approval and sign-off between various departments and supply chain partners are automated and help eliminate supply chain errors often caused by manual processes to update product information. Oracle will also help improve a company's quality management program and help keep track of supplier and manufacturing partner key performance indicators (KPIs) through its analytics.

For additional information, contact:
(T) 800-633-0738
(W) www.oracle.com/industries/semiconductor

Rapid Bridge is an innovator in advanced semiconductor design and development processes with a unique approach to addressing the industry's issues of cost, performance, power and time-to-market. The company's disruptive, game-changing technologies and solutions create exceptional value for customers by enabling them to lead the next-generation silicon products.

Rapid Bridge's liquid product family—LiquidIP, LiquidASIC and LiquidSoC—leverages its proprietary Global Shared Resources Architecture to deliver IP and IC designs that are among the smallest, lowest power and best-performing solutions available. Their liquid or metal-programmable products offer customers greater flexibility for design changes or derivative products with significantly reduced costs and time-to-market.

Rapid Bridge's revolutionary core power reduction (CPR) is a matchless solution for improving power, performance and area (PPA) metrics for complex SoC designs. Unlike other approaches, CPR technology improves all PPA components concurrently—without tradeoffs.

Rapid Bridges Design Services Division is a global leader in cutting-edge IC design technology with extensive, proven experience delivering complex multi-million gate chip designs targeted to multiple deep submicron technologies.

For additional information, contact:
Ken Reilich
(T) 858-410-5900
(E) sales@rapidbridge.com
(W) www.rapidbridge.com

Serus has added new features in its flagship Intelligent Operations Management (IOM) suite of products that enable companies to deal with the current extension of supply cycle times due to supplier allocations. These allocations, in turn, are requiring companies to manage customer fulfillment using exceptions processes. The new features in Serus IOM allow companies to manage this situation more efficiently across the spectrum of processes that are impacted—front-end and back-end manufacturing, quality engineering and order fulfillment. Key additions were supplier on-boarding—the ability to fully integrate suppliers within weeks; tactical planning—wafer to fulfillment lot level tactical supply chain planning capabilities with scenario comparison, rapid planning, integrated real-time supply visibility, multi-level binning/downgrading optimization, consumable/durable planning, projected cost/margin and integrated order promising capabilities; and integrated manufacturing and engineering data management with supplier/factory systems—no-touch synchronization of manufacturing specifications with integrated engineering change order (ECO) across internal and supplier master data systems, improving manufacturing quality, reducing waste and decreasing cycle times. Drawing on its years of experience in the semiconductor industry, Serus continues to innovate and extend its suite of products to adapt to the changing circumstances.

For additional information, contact:
Anush Ramodiya
(T) 408-716-6212
(E) anush@serus.com
(W) www.serus.com

Sidense provides secure, very dense and reliable non-volatile OTP memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The company's innovative one-transistor (1T)-Fuse architecture provides the industry's smallest footprint, most reliable and lowest power logic NVM IP solution. With over 60 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask read-only memory (ROM) and eFuse in many OTP and multi-time programmable (MTP) applications.

Sidense OTP memory is available from 180 nm down to 40 nm, and is scalable to 28 nm and below. The IP is offered at and has been adopted by top-tier semiconductor foundries and selected integrated device manufacturers (IDMs) for precision analog trimming, code storage, encryption keys such as High-bandwidth Digital Content Protection (HDCP), radio frequency identification (RFID) and chip ID, medical, automotive, and configurable processors and logic.

For additional information, contact:
Jim Lipman
(T) 925-606-1370
(E) jim@sidense.com
(W) www.sidense.com

Whizz Systems is an engineering and manufacturing services company headquartered in Silicon Valley, California. The company announced expansion to its facility by acquiring a new 60,000 square foot building and adding new surface mount technology (SMT) lines to service their increasing demand. The company sees a new trend in offshoring specifically for new product introduction (NPI), and companies desiring to keep their prototyping and design for manufacturability (DFM) close to their homeland.

For additional information, contact:
Affif Siddique
(T) 510-432-0030
(E) saffif@whizzsystems.com
(W) www.whizzsystems.com