Q: By targeting the hybrid TV market, Fresco Microchip transformed itself into one of the fastest growing fabless companies of 2010. How does Fresco plan to continue this momentum? While there are few companies serving this market, how does Fresco ensure that it remains innovative and competitive?

A: One of the first strategic decisions Fresco Microchip made was to serve an existing market (which for us was hybrid TV), thereby reducing market risk. This has greatly contributed to our growth. The company's unwavering dedication to delivering value through innovation and providing performance improvements that reduce system costs will sustain our incredible growth. We have a multi-generation plan geared towards providing this value to the TV tuner industry and other consumer electronic (CE) companies.

To remain competitive, we structure the company around innovation. We have a fundamental understanding of system requirements and a continued objective of trying to improve the value proposition that we present with every product generation. In the past, I have witnessed start-ups developing innovative technology, riding that innovation without improving upon it, and as a result, competitors taking away their market share. A company must always innovate, be aware of their value proposition and continually update their proposition or else it will be taken from them.

Q: Can you give us an example of how Fresco Microchip has helped to drive technology? As a GSA member for over four years, how has the Alliance helped Fresco in this endeavor?

A: It was only two years ago that analog demodulator chips with external SAW filters saturated the TV market. However, today, these chips are essentially disappearing within this market with the introduction of the hybrid model. As previously mentioned, Fresco has always had a thorough understanding of system requirements and how combining analog and digital signal processing (DSP) technology could create a paradigm shift in the market. Fresco has established a new benchmark for picture quality at the lowest system cost.

GSA is an invaluable source of industry information and networking. They say no man is an island, and no start-up is an island either. Without this industry support, I believe it is very tough, particularly when you are not in Silicon Valley, to be a successful start-up.

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Q: As the complexity of today's electronic devices increases, chip design verification becomes more of a challenge. Please explain how Jasper Design Automation's formal verification solutions reduce risk and accelerate time-to-market for chip companies.

A: The Jasper difference is in the way we apply and deploy advanced formal verification solutions to meet the particular needs of our customers. Our solutions address a spectrum of design-critical verification challenges such as getting the architecture unambiguously right, enhancing design reuse, verification including low-power optimization, protocol certification and post-silicon validation. Deploying formal technology, from design inception through intellectual property (IP) exploration and even post-silicon, can greatly accelerate time-to-market and deliver a high return on investment (ROI). We often hear from new customers that formal verification can quickly root out bugs in designs that had previously been in verification for months.

Q: The verification obstacles encountered by system designers and chip designers are becoming increasingly similar, leading some to believe that the two groups will eventually merge. How does the use of formal verification benefit system designs?

A: The early use of formal verification for model system architectures before register transfer level (RTL) can provide benefits through the entire development cycle, spanning both hardware and embedded software. Formalizing an executable spec accelerates the design and verification of a chip and individual design components. High-capacity formal verification is also key for verifying hardware interaction with software, including the operation of software-configurable registers, register assignments, and other software-programmable hardware functions such as power control. Looking at the need for hardware/software co-design, and the marriage of hardware and software verification for systems, formal verification technology is critical. Formal verification, by its mathematical nature, is independent of complexity in a way simulation can never approach, and can verify complex interactions rapidly and comprehensively for hardware, software and systems.

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