Electrostatic Discharge (ESD) precautions are well understood and implemented throughout all stages of semiconductor development (fabrication, assembly, test, device usage, and field failure analysis). Advanced packaging techniques such as 2.5D/3D exacerbate this problem, requiring special consideration. GSA, in association with the ESD Association and academia, investigated how this phenomenon differs in the 3D packaging environment. This extensive research, including case studies, is delineated in the GSA-ESDA 3D-IC ESD white paper.
Completed by the process design kit (PDK) developer and delivered with each new release of an mixed-signal PDK, this document provides a better understanding of the source data, completeness and quality of the PDK before it is used to design ICs or modified to fit into in-house design flow. The Checklist Users Guide has been combined with the checklist, in Version 4.0 (July 2013)
This checklist defines a broad spectrum of items that must be considered by Supply Chain management of both companies in a merger or acquisition. This initial release is targeted toward the Supply Chain Professional and is not yet all-encompassing. Future work will extend the checklist to include Legal, Financial, Human Resources, and IT aspects.
IP blocks dominate many designs; therefore, determining the best source of IP can be critical to design success. Three primary paths exist to acquiring IP:
- Purchase from an external source
- Reuse of existing IP (with or without modification)
- Newly designed
Each path has cost, performance, and risks associated with IP acquisition. This interactive tool aids the design team in analyzing these trade-offs, providing a quantitative evaluation of various sources.
This checklist provides the quality framework for semiconductor testing before product is shipped. It defines tests and parameters required to minimize the level of bad product shipped to an end customer.
- While this is not meant to be a comprehensive list, it can be useful to:
- Analyze gaps in testing
- Provide the top 3-5 test areas for each line of defense against shipping low quality product
- Improve Customer Awareness, by providing a guideline for customers to better understand the test environment
This checklist provides a recommended list of parameters that foundries should measure and test; a uniform way to measure each parameter; and a consistent way to describe the test data.
This checklist identifies the different elements of a foundry’s AMS process and its ability to fulfill a semiconductor company’s needs; serves as a basic set of guidelines for measuring available items in an AMS foundry process; and is an efficient way to communicate information in a consistent format across all foundries.
Completed by the SPICE model developer and delivered with each new release of a SPICE model, this document helps developers better understand the source data, completeness, and quality of the model before using it to design chips or to re-extract it to fit into specific product needs. A Checklist Users Guide and Checklist Taxonomy & Definitions are also available for download.
Working group presentations from 2015 and 2016.