Head of Design and Technology Platform
Lie-Szu Juang is the deputy head of Design and Technology Platform at TSMC. She leads multiple teams worldwide to enable customer design through design solutions of 3nm, 5nm, 7nm, and specialty technologies like embedded flash, HV/BCD, RF & SOI, and MRAM/RRAM. She is responsible for PDK, foundation library, design flow, and 3rd-party eco-system EDA/IP/service partners to enable 280 customers for 1000 successful project tape-outs each year. In this capacity, she contributed about $15 billion dollars, or 40% of TSMC revenue in 2019. She is well recognized in the foundry industry as the go-to person for solving any complex technical problems that require multiple cross-function disciplines.
Lie-Szu Juang joined TSMC in 1996 to manage ASIC design. Since then, she has held various management positions with growing responsibility and widening scope, including application engineering, technical marketing, quality assurance, product testing, design-technology co-optimization in R&D, and customer engagement. Prior to TSMC, she worked for AT&T Bell Labs and Drexelbrook Engineering on analog circuits and microprocessor designs.
Lie-Szu Juang earned her Master degree from University of Pennsylvania and Bachelor degree from National Taiwan University, both in Electrical Engineering. She received various prestigious international awards such as 2016 National Outstanding Manager Award in Taiwan. Outside of work, she is passionate in motivating female and minority professionals to pursue their dreams. She is married with 2 children.