Autonomous Driving and Sensor Fusion SoCs

Paper Submitted by Thomas Wong, Director of Marketing, Automotive Segment, Design IP Group, Cadence Automotive Market Trends In 2016, McKinsey published a report (“Automotive revolution—perspective towards 2030”, McKinsey & Company, January 2016) outlining their perspective of automotive trends through 2030. They described four distinct trends that will drive the automotive industry: connectivity, autonomy, car sharing and electrification. At that time, there was much uncertainty about how much progress could be made in the short term given the technical and business challenges. The connectivity required to support vehicle-to-vehicle (V2V), vehicle to infrastructure (V2I) or vehicle to everything (V2X) was practically non-existent. Read More

Autonomous Driving and Sensor Fusion SoCs2019-11-07T16:42:25-06:00

Budgeting for Hardware Emulation Platforms

Paper Submitted by Lauro Rizzatti, Verification Expert, Rizzatti Hardware emulation is a strategically essential ingredient of a verification flow used in a broad range of applications. It’s also an expensive line item in a yearly budget because of a variety of factors including acquisition cost and expenses to keep it operational, usable, safe and in good working condition. As chip design engineering and verification groups present their budgets for 2020, it’s useful to review the benefits of hardware emulation, and the range of parameters and engineering criteria that contribute to its cost of ownership (COO) before approving the purchase. Thirty Read More

Budgeting for Hardware Emulation Platforms2019-10-25T12:54:18-05:00

The Emergence of Verification 3.0

Paper Submitted by David Kelf, Vice President and Chief Marketing Officer, Breker Verification Systems Announcements about new semiconductor applications for artificial intelligence and automotive electronics are welcome news for the semiconductor industry, driving new end-user opportunities. Naturally, these bigger, more powerful chips require formidable, robust verification methodologies. Traditional simulation-based verification is not enough. Even hardware emulation and formal verification environments need fortification. New thinking is required to meet the demands of these complex applications with differing requirements than the past. With so many changes happening in fast succession, some industry watchers believe we’re entering the Verification 3.0 era and the Read More

The Emergence of Verification 3.02019-10-25T12:22:29-05:00

Opposites Attract: IP Standardization vs. Customization

Paper Submitted by Dr. Carlos Macian, Senior Director AI Strategy & Products, eSilicon Corporation Have you had a look lately at an autonomous driving SoC? Have you noticed, besides the cool machine learning stuff, the grocery list of third-party IP that goes into it? It is a long, long list, composed of pieces both big and small and quite diverse. For example, interface and peripheral PHYs and controllers, memories, on-chip interconnects, PVT monitors and PLLs. In some highly-publicized examples, the list includes eSilicon memories, by the way. For something developed under such secrecy and that aims to be so differentiating, Read More

Opposites Attract: IP Standardization vs. Customization2019-10-25T12:09:20-05:00

Shining a Light on Ray Tracing

| Paper Submitted by Imagination Technologies | Shining a light on ray tracing For anyone who knows anything about real-time 3D graphics, something truly exciting is taking place in the industry right now: the proliferation of real-time ray tracing. Often described as the ‘holy grail’ of computer graphics, ray tracing is where a 3D scene is generated using a technique that mimics how light behaves in the real world, thus providing developers with the tools to make incredibly realistic visuals. In 2016 Imagination introduced a board featuring the world’s first dedicated ray tracing accelerator that, for the first time, delivered Read More

Shining a Light on Ray Tracing2019-10-25T11:02:58-05:00

“ASIC 2020” – ASIC and ASIC Success Redefined

| Paper Submitted by Jack Harding, president and CEO, eSilicon | Introduction A major shift in the application-specific integrated circuit (ASIC) market has occurred over the past five years. The forces at play are most evident at the top end of the market, but they will impact the entire customer base and supply chain over time. It is well-known that Moore’s Law is finally slowing down. The implications of this trend are driving complexity increases in ASIC design across new dimensions. One can no longer rely on a faster clock to deliver the next-generation product. Instead, substantial amounts of integration Read More

“ASIC 2020” – ASIC and ASIC Success Redefined2019-09-09T13:15:44-05:00

Chiplets: Open Market or Joint Venture?

| Paper Submitted by Dr. Carlos Macian, Senior Director AI Strategy & Products, eSilicon Corporation | “Chiplet” has become a buzzword and like most of its kind, the success of the buzzword predates the widespread availability of the product by a large margin. However, this is such a conceptually sound and attractive idea: How could it fail to become reality, when everybody wants it? Well, because it does not make economic sense. Not in its pure form, anyway. Let me explain. The idea of chiplets holds great promise and is often associated with the open-source movement, empowering both big and Read More

Chiplets: Open Market or Joint Venture?2019-09-09T13:17:39-05:00

Verification Challenges for RISC-V Adoption

| Paper Submitted by Tom Anderson, Technical Marketing Consultant, OneSpin Solutions | Just a few years ago, the idea of an open-specification processor architecture with open-source implementations available would have been dismissed by many. Modern processor designs are highly complex, with such advanced features as multi-stage pipelines, multi-level caches, out-of-order execution, branch prediction, and memory pre-fetching. Beyond the hardware design, a huge ecosystem is needed. Reference design kits and software development platforms are essential. Operating systems and applications must be ported to the new architecture. A significant portion of the system-on-chip (SoC) industry must design-in the new processor and validate Read More

Verification Challenges for RISC-V Adoption2019-09-09T13:18:50-05:00